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模擬電路設(shè)計(jì)工程師-analog design engineer
面議 西安 2年以上 本科
  • 全勤獎(jiǎng)
  • 節(jié)日福利
  • 不加班
  • 周末雙休
  • 商業(yè)保險(xiǎn)績效獎(jiǎng)金彈性工作
西安紫光國芯半導(dǎo)體有限公司 最近更新 3782人關(guān)注
職位描述
該職位還未進(jìn)行加V認(rèn)證,請仔細(xì)了解后再進(jìn)行投遞!
職位描述:
responsibilities:
1. physical design for memory products: full custom layout for analog and digital circuits in high performance drams.
2. floor planning signal- and bus planning according to predefined specifications.
3. chip size optimization.
4. area- and parasitic optimized layout.
5. assembly of blks and top level hierarchies including routing.
6. verification of circuits (design rule check, layout versus schematic, electrical rule check).
7. generation of fill structures according to technology requirements.
8. optical simulations on technology driven circuits.
9. investigations on electro migration and ir drop.
requirements:
1. bachelor in microelectronics, electronic engineering, or related field.
2. familiar with cad software.
3. familiar with semiconductor process and structures of devices.
4. team oriented, love to work in young, international and highly motivated teams.
5. good communication skills.
6. high grade of flexibility.
7. highly motivated and engaged.
8. experience in digital analog and or mixture signal ic is preferred.
9. experience in flash,sram and dram design is preferred.
10. experience in backend design flow (apr) is preferred.
11. english language skill in writing and speaking is a must.
聯(lián)系方式
注:聯(lián)系我時(shí),請說是在河北人才網(wǎng)上看到的。
工作地點(diǎn)
地址:西安雁塔區(qū)西安-科技二路
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詳細(xì)位置,可以參考上方地址信息
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